1. Field of the Invention
The present invention is generally in the field of memory systems and devices. More particularly, the present invention is in the field of content-addressable memory (CAM) systems and devices.
2. Background Art
Many computer-based technologies today rely on high speed access to data storage in order to produce highly interactive experiences for end users. In an environment where typical data sets are growing significantly larger, merely relying on larger designed bandwidths and higher bus and processor frequencies has diminishing returns. As a result, methods to reduce monolithic processor usage and data bus bandwidth requirements have been developed over time. One example method is the use of content-addressable memory (CAM) in order to speed up and offload search processes from conventional processors and data buses.
CAM is a type of memory that can take an input search word or series of bits, compare it against every entry within the CAM, and output a match location, all subject to a single clock cycle throughput. A generic CAM system may improve high speed processing in at least two ways: it can perform an exhaustive search very quickly, and it can reduce or eliminate a need to transfer large data sets to and from a memory array in order to perform a conventional search using, for example, a conventional monolithic processor. In the most basic case, where a data set is already resident in a CAM system and may be used for multiple searches, the only data bus bandwidth required is that used to designate the search word to the CAM system initially, and that used to return a search result.
However, as the relative speed of conventional monolithic processors and data buses increases over time, the benefits of conventional CAM systems risk becoming overshadowed by their extra dedicated space requirements as well as their additional power requirements. For instance, a major drawback of conventional CAM systems is that in order to provide their search results, the entire CAM array is typically powered and operational, which makes conventional CAM systems relatively expensive to use due to high power consumption and the on-chip space used to provide such power.
Thus, there is a need to overcome the drawbacks and deficiencies in the art by providing a compact and inexpensive architecture for reducing CAM system power consumption and increasing CAM system speed.